Driving circuit for square loop magnetic cores



1963 w. A. E. LOUGHHEAD 3,112,407

DRIVING CIRCUiT FOR SQUARE LOOP MAGNETIC CORES Filed May 25, 1960 4 Sheets-Shet 1 Fig.2.

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DRIVING CIRCUIT FOR SQUARE LOOP MAGNETIC CORES Filed May .23, 1960 4 Sheets-Sheet 2 M w m w y W WJZ v/ m .mw msM. ST W .E W a: i 3 $3 m mm 2 as ST 9G E a w & 6 Q LR & comm \& G: fig m B DRIVING CIRCUIT FOR SQUARE LOOP MAGNETIC CORES Filed may 25, 1960 Nov. 26', 1963 w. A. E. LOUGHHEAD 4 Sheets-Sheet 3 /NVE/VTOE WILL/AM AME DWD (CUM/1&0

5r ZTmRA/EKS United States Patent YO 3,112,407 DRIVING CIRCUIT FGR QUARE LOOP MAGNETHC CORES William Albert Edward Loughhead, Beeston, England,

assignor to Ericsson Telephones Limited, London, England, a British company Filed May 23, 1960, Ser. No. 3%,886 Claims priority, application Great Britain May 25, 1959 3 Claims. (Cl. 30788) The present invention relates to an improved circuit for providing a constant voltage driving source for a core of square loop magnetic material.

Magnetic cores may be switched by constant current inpots or, preferably, by constant voltage inputs. The two main reasons for switching a magnetic core from a constant 'voltage source in preference are firstly to provide a well-defined output voltage pulse source of relatively low impedance, and secondly to provide an output pulse the duration of which may be controlled within predetermined limits. Ilhis second condition is of particular importance when a plurality of similar cores are employed, the characteristics of which may vary within relatively wide manufacturing tolerances.

According to the present invention a driving circuit for square loop magnetic cores comprising a transistor having its collector electrode connected to a first terminal for connection to one pole of a source of operating potential through a driving winding or windings on one or more magnetic cores, the emitter electrode being connected through a resistor to a second terminal and the base being connected through a resistor and a diode in parallel to a third terminal which is also connected to the collector electrode through a second diode, either the second or the third terminal being coupled to the output terminal of a blocking oscillator and the other of the second and third terminals being for connection to the other pole of the source of operating potential and the arrangement being such that, in operation, with one or more driving windings connected in series with a source of potential between the first terminal and the said other of the second and third terminals, output pulses from the blocking oscillator cause the collector electrode of the transistor to bottom or become fully conductive to an extent controlled by the second diode.

The blocking oscillator is preferably a transistor blocking oscillator coupled to the first said transistor by means of a transformer.

The invention will now be described by way of example with reference to the accompanying drawings, in which:

'FIG. 1 shows a magnetic core 1 of square loop material having an input winding 2, a reset winding 3 and an output winding 4 to which is connected a load 5,

FIG. 2 shows an ideal hysteresis loop for the square loop core 1, and

FIG. 3 shows certain waveforms which will be used to explain the operation of the arrangement shown in FIG. 1.

FIG. 4 is the circuit diagram of one embodiment of the invention,

FIG. 5 is a diagram of a number of waveforms used in explaining the operation of FIG. 4, and

FIG. 6 is a circuit diagram showing wherein another embodiment of the invention differs from that shown in FIG. 4.

Consider that at a time it) the core 1 is in the A state, that is in a magnetic state represented by the point a on the hysteresis loop shown in FIG. 2, and the load 5 is disconnected. When a rectangular pulse P (FIG. 3a) from a constant voltage source is applied to the input winding 2 the current I flowing in the winding 2 is of the ampli- I in series.

3 ,112,407 Patented Nov. 26., 1963 tude and duration shown by the full line in F IG. 3b. The inductance of the winding 2 is relatively low during the period 0 to t1, that is from point a to the point b on the hysteresis loop and accordingly the current I rises rapidly. Subsequent to time t1 (point b on the hysteresis loop) the core '1 changes from state A to state B. and a relatively large change of flux occurs. This limits the rise of the current I during the period tl to t2 when the point c on the hysteresis loop is reached. Subsequent to time 12 the inductance of the winding 2 is again low and the current I again rises rapidly until the point d on the hysteresis loop is reached at time t3. After time t3, when the core '1 becomes saturated at the point d, the current 1 reaches the maximum value available from the source. When the pulse P is terminated at the time t4 the core =1 assumes the stable state B at point e and the current 1 falls rapidly towards zero which it reaches at time t5. A rectangular voltage pulse V (FIG. 30) is developed across the output winding 4 during the time ii to t2 during which time the core 1 changes from the state A to state B. The core 1 may be reset to state A by applying a suitable pulse to the reset winding 3.

When a load 5 is connected to the output winding 4, the current I is of the amplitude and duration shown by the broken line in FIG. 3b. If a transistor is employed as the constant voltage source it may be beyond the capabilities of the transistor to supply this current I. The arrangement shown in FIG. 4 has been designed to provide a constant voltage source employing a transistor and being suitable for switching a square loop magnetic core.

Referring to FIG. 4, a blocking oscillator comprises a p-n-.p transistor VTl, a transistor TF, resistors R4, R5 and R6 and a junction diode D3. Thus resistors R4 and R5 are in series between ground and a source of potential at +1.5 volts, the junction of the resistors being connected to an input terminal 15 and the base of the transistor VTl. The emitter of the transistor is connected to ground through one winding FF of the transformer 'IlF whilst the collector is connected to l2 vol-ts through the primary winding =PP of the transformer. When the transistor VTl conducts the collector current in winding PP induces a current in the winding EF which acts as a regenerative feedback to the emitter. An output current pulse is thereby induced in a winding 10. The blocking oscillator is thereby of conventional design. The primary Winding PP is shunted by the diode D3 and resistor R6 These elements consisting of diode D3 and resistor R6 serve to damp the voltage overswing which occurs when the transistor V'Tl ceases to conduct. When overswing occurs, diode D3 conducts when the collector voltage falls below 12 volts. Resistor R3 is then effectively connected across winding PP and limits the overswing to about 20 volts. Otherwise the collector voltage would fall to about --l00' volts, with the possibility of damage to the transistor. One end of the output winding 10 on the transformer FF is connected to a source of positive potential of 1.5 volts, and the other end is connected to the base and collector electrodes of a core driving transistor VT2 by way of a parallel arrangement of a resistor R1 and junction diode D1 and a junction diode D2 respectively. The collector electrode of the transistor VT2 is connected to the input winding 2 of a magnetic core arrangement similar to that described with reference to FIG. 1. The emitter electrode is connected to a grounded first terminal, TTl through a resistor R2. The junction of R1, D1 and D2 forms a second terminal TF2. The blocking oscillator is so designed that the maximum current available from the winding 10 is greater than the sum of the base current ib of the transistor VT2 and the current id in the diode D2 under all conditions of operation.

When a trigger pulse is applied to the input terminal 15 connected to the base of the transistor VTl of the blocking oscillator, an output voltage pulse of the amplitude and duration shown in FIG. 5a, is developed across the winding 10 of the transformer TE as is conventional with blocking oscillators. At the commencement of this output pulse (time it) to $1) the junction diode D1 conducts, thus providing a low impedance by-pass for the resistor R1. The potential at the base electrode of the transistor VT2 falls below ground potential causing the potential at the emitter electrode to fall as shown in FIG. 5b. The current ip flowing in the collector electrode has a value where o; is the current gain of the transistor VT2, VA is the magnitude of the voltage generated across the winding 10, VD is the magnitude of the voltage across the diode D1 and VB is the magnitude of the base-collector voltage of the transistor VT2. This current must be of sufficient amplitude to supply the current to switch the core 1 and the current taken by the load 5. The graph of the current ip with respect to time is shown in FIG. 5d. The potential developed across the input winding 2 of core V1 is substantially VB-VA+1.5. The current I (FIG. 50) commences to flow in the input winding 2 and rises rapidily during the period t to t1 causing the collector voltage (FIG. 52) to rise rapidly until the transistor VT2 bottoms (conducts fully). The current id flowing through the junction diode D2 is the difference between the current supplied by the collector of transistor VT2 and the current taken by the input winding 2. Under bottomed or fully conductive conditions the collector of transistor VT2 is at a positive potential with respect to the base, and this positive potential added to the forward potential across the junction diode D1 is sufficient to maintain the junction diode D2 conducting during the period t0 to t3 during which the transistor VT2 remains bottomed. If the junction diode D2 was not connected in the circuit, heavy bottoming would occur in transistor VT2 due to the excessive base current which would flow. Hence this would produce excessive power dissipation within the transistor VT2. The condition is that VC+VD VD where V0 is the minimum positive collector-base bottoming voltage, VD is the minimum forward voltage across D1 and VB is the maximum forward voltage across D2.

The output voltage developed across the winding 4 of core -1 is shown in FIG. 5 When the core 1 has been switched to state B at time t2 the current I rises until it reaches the same value as ip and accordingly the current id falls to Zero. The potential at the collector electrode falls to the level of the negative source VB. At the termination of the ouput pulse from the blocking oscillator (at time t4) the value of the current ip falls rapidly so that the potential at the collector electrode overswings in an attempt to maintain the current I flowing in the winding 2. The junction diode D1 and the resistor R1 limit this overswing. At the same time t4, the end of the winding 7% connected to the junction diode D1 acquires a positive potential so that junction diode D1 is back biased and the resistor R1 becomes the effective resistance in the base circuit of transistor VT2. This reduces the rate of decay of the current ip and thus limits the overswing of the potential at the collector electrode to a relatively small value. In practice there may be several cores in the B state with their windings connected in series with the winding 2 of core 1 and these windings may increase the inductance of the circuit so that the overswing could become excessive but for these measures.

The effect of decreasing the value of the load 5 is to increase the amplitude of the current I, for example to the value shown in dotted line in FIG. 50. Thus the current supplied to the load 5 is only limited by the peak ivalue of the current ip which is in turn limited by the dissipation of the transistor VT2 and the power available from the blocking oscillator. In one embodiment using components of the values indicated in the drawing the output taken from the blocking oscillator was of the order of 15 milliwatts, the output provided by the transistor VT2 was of the order of milliwatts and the power supplied to the load varied between 0 and 60 milliwatts. Thus with the arrangement of our invention a transistor blocking oscillator may be provided with two windings l0 and two transistors VT2 and associated components to drive two cores 1. By careful consideration of the component values this arrangement may be extended to drive four cores without a great deal of dithculty. Of course by providing a more powerful blocking oscillator VTl the arrangement may be further extended.

The arrangement shown in FIG. 6 will not be described in detail since it corresponds closely to that shown in FIG. 4. The blocking oscillator and the transformer are identical and therefore not shown, only the output winding 14) of the transformer being shown in this figure. The transistor VT2 is emitter-driven rather than base driven. Thus components R1, R2, D1 and D2 are connected to the transistor VT2 just as before but winding :10 is connected to the resistor R2 in the emitter lead instead of to the junction of R1, D1 and D2 which junction of R1, D1 and D2 is now grounded. Hence the output of the blocking oscillator is now applied to second terminal TIZ and the first terminal 'l'Tl is connected to ground which is the positive terminal of the voltage supply for transistor VT2. Since an emitter-driven transistor does not amplify the number of magnetic cores which can be driven with this circuit is determined by the blocking oscillator. With the transistors VT]. and VT2 as in the circuit of FIG. 4 only one core can be driven but if VTl is a transistor having a greater power output more than one core can be driven.

It will be appreciated that n-p-n transistors can be employed instead of p-n-p transistors, the polarities of the operating potentials and of the diodes being reversed.

I claim:

1. A driving circuit for square loop magnetic cores comprising a transistor having collector, emitter and base electrodes, a first pole of a source of operating potential, at least one magnetic core driving winding connected between said collector electrode and said first pole, a first terminal, a first resistor, said resistor being connected between said emitter electrode and said first terminal, a second terminal, a first diode and a second resistor, said first diode and second resistor being connected in parallel between said base electrode and said second terminal, a second diode connected between said collector electrode and said second terminal, a blocking oscillator having an output terminal, said blocking oscillator output terminal being connected to one of said first and second terminals and the other of said first and second terminals being for connection to the other pole of said source of operating potential.

2. A driving circuit for square loop magnetic cores comprising a transistor having collector, emitter and base electrodes, a source of operating potential having first and second poles, at least one magnetic core driving winding connected between said collector electrode and said first pole of said source, a first terminal, a first resistor, said first resistor being connected between said first terminal and said emitter electrode, a second terminal, a second resistor and a first diode, said second resistor and first diode being connected in parallel between said second terminal and said base electrode, a second diode connected between said second terminal and said collector electrode, a blocking oscillator having an output terminal connected to one of said first and second terminals, the other of said first and second terminals being connected to said second pole of said source, whereby output pulses generated by said blocking oscillator cause said collector coupled to the said first transistor by means of said transelectrode of said transistor to bottom to an extent conformer. trolled by f q dlode' References Cited in the file of this patent 3. A driving circuit for square loop magnetlc cores according to claim 1 further comprising a transformer, said 5 UNITED STATES PATENTS blocking oscillator being a transistor blocking oscillator 2,843,762, Trent July 15, 1958 

2. A DRIVING CIRCUIT FOR SQUARE LOOP MAGNETIC CORES COMPRISING A TRANSISTOR HAVING COLLECTOR, EMITTER AND BASE ELECTRODES, A SOURCE OF OPERATING POTENTIAL HAVING FIRST AND SECOND POLES, AT LEAST ONE MAGNETIC CORE DRIVING WINDING CONNECTED BETWEEN SAID COLLECTOR ELECTRODE AND SAID FIRST POLE OF SAID SOURCE, A FIRST TERMINAL, A FIRST RESISTOR, SAID FIRST RESISTOR BEING CONNECTED BETWEEN SAID FIRST TERMINAL AND SAID EMITTER ELECTRODE, A SECOND TERMINAL, A SECOND RESISTOR AND A FIRST DIODE, SAID SECOND RESISTOR AND FIRST DIODE BEING CONNECTED IN PARALLEL BETWEEN SAID SECOND TERMINAL AND SAID BASE ELECTRODE, A SECOND DIODE CONNECTED BETWEEN SAID SECOND TERMINAL AND SAID COLLECTOR ELECTRODE, A BLOCKING OSCILLATOR HAVING AN OUTPUT TERMINAL CONNECTED TO ONE OF SAID FIRST AND SECOND TERMINALS, THE OTHER OF SAID FIRST AND SECOND TERMINALS BEING CONNECTED TO SAID SECOND POLE OF SAID SOURCE, WHEREBY OUTPUT PULSES GENERATED BY SAID BLOCKING OSCILLATOR CAUSE SAID COLLECTOR ELECTRODE OF SAID TRANSISTOR TO BOTTOM TO AN EXTENT CONTROLLED BY SAID SECOND DIODE. 